A field programmable gate array (FPGA) is an integrated circuit that can achieve an appropriate logical function. An FPGA includes logical blocks (LBs) that perform appropriate logical operations, and switch blocks (SBs) that switch wiring line connections among the logical blocks. Each logical block includes at least a look-up table circuit (hereinafter also referred to as a LUT circuit), and the LUT circuit outputs a value stored in a memory in accordance with an input pattern. As this memory is rewritten, a wiring line switching function can be implemented in the LUT circuit.
Each switch block switches connections between wiring lines, and has the functions of a multiplexer circuit (hereinafter also referred to as a MUX circuit). A MUX circuit has a function to select one of the input terminals and connect the selected input terminal to the output terminal. Each switch block includes at least one MUX circuit. A switch block in which all the input terminals can be connected to all the output terminals is called a cross-point switch block.
Such a cross-point switch block has a problem of large power consumption due to leakage from the gates of transistors as will be described later.